Memory Circuit Design Engineer
Job Description
Memory Circuit Design Engineer
5 days onsite at Ottawa, Ontario
15 positions
Contract and FTE - Open
Look for Using CADENCE SPECTRE (tool used for circuit design)
Qualification Required:
Typically requires minimum of 2-13+ years of experience in Memory Design with mainstream SRAM tools
Bachelors / master's degree in E&E and E&C
Strong communication and teamwork skills
Roles And Responsibilities
Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations.
Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis.
Good exposure to validation of the characterized data.
Strong knowledge of physical implementation impact on circuit performance.
Experience with the most advanced technology nodes up to 28nm and below.
How to Apply
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Frequently Asked Questions
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This role is with HCLTech in Ottawa.
Is this a remote position?▼
This appears to be an on-site role in Ottawa.
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What skills are needed?▼
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